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tc74vhc123,221af/aft/afk 2012-02-29 1 toshiba cmos digital integrat ed ci rcuit silicon monolithic tc74vhc123af,tc74vhc123a ft,tc74vhc123afk tc74vhc221af,tc74vhc221a ft,tc74vhc221afk dual monostable multivibrator tc74vhc123af/aft/afk retriggerble tc74vhc221af/aft/afk non-retriggerble the tc74vhc123a/221a are high speed cmos monostable multivibrator fabricated with silicon gate c 2 mos technology. there are two trigger inputs, a input (negative edge), and b input (positive edge). these inputs are valid for a slow rise/fall time signal (t r = t f = 1 s) as they are schmitt trigger inputs. this device may also be triggered by using clr input (positive edge). after triggering, the output stays in a monostable state for a time period determined by the external resistor and capacitor (r x , c x ). a low level at the clr input breaks this state. limits for c x and r x are: external capacitor, c x : no limit external resistor, r x : v cc = 2.0 v more than 5 k ? v cc 3.0 v more than 1 k ? an input protection circuit en sures that 0 to 5.5 v can be applied to the input pins withou t regard to the supply voltage. this device can be used to interface 5 v to 3 v systems and two supply systems such as battery back up. this circuit prevents device destruction due to mismatched supply and input voltages. features ? high speed: t pd = 8.1 ns (typ.) at v cc = 5 v ? low power dissipation standby state: 4 a (max) at ta = 25c active state: 600 a (max) at ta = 25c ? high noise immunity: v nih = v nil = 28% v cc (min) ? power down protection is equipped with all inputs. ? balanced propagation delays: t plh ? t phl ? wide operating voltage range: v cc (opr) = 2 to 5.5 v ? pin and function compatible with 74hc123a/221a tc74vhc123af, tc74vhc221af tc74vhc123aft, tc74vhc221aft tc74vhc123afk, tc74vhc221afk weight sop16-p-300-1.27a : 0.18 g (typ.) tssop16-p-0044-0.65a : 0.06 g (typ.) vssop16-p-0030-0.50 : 0.02 g (typ.)
tc74vhc123,221af/aft/afk 2012-02-29 2 pin assignment iec logic symbol truth table inputs outputs a b clr q q function h h output enable x l h l h inhibit h x h l h inhibit l h output enable l h output enable x x l l h reset x: don?t care v cc 16 1r x /c x 1c x 1q 15 14 13 12 11 10 a1 1 2 3 4 5 6 7 2q 2c x 2r x /c x gnd 8 a2 9 2b (top view) 1b clr1 q1 clr2 q2 (2) (1) (3) (15) (14) 1c x 1r x /c x (13) 1q clr1 a1 1b tc74vhc123a r (4) q1 c x r x /c x & (10) (9) (11) (7) (6) 2c x 2r x /c x (5) 2q clr2 a2 2b (12) q2 r c x r x /c x & (2) (1) (3) (15) (14) 1c x 1r x /c x (13) 1q clr1 a1 1b tc74vhc221a r (4) q1 c x r x /c x (10) (9) (11) (7) (6) 2c x 2r x /c x (5) 2q clr2 a2 2b (12) q2 1 & r c x r x /c x 1 &
tc74vhc123,221af/aft/afk 2012-02-29 3 block diagram (note 1) (note 2) note 1: c x , r x , d x are external capacitor, resistor, and diode, respectively. note 2: external clamping diode, d x ; the external capacitor is charged to v cc level in the wait state, i.e. when no trigger is applied. if the supply voltage is turned off, c x is discharges mainly through the internal (parasitic) diode. if c x is sufficiently large and v cc drops rapidly, there will be some possi bility of damaging the ic through in rush current or latch-up. if the capacitance of t he supply voltage filter is large enough and v cc drops slowly, the in rush current is automatically limit ed and damage to the ic is avoided. the maximum value of forward current through the parasitic diode is 20 ma. in the case of a large c x , the limit of fall time of the supp ly voltage is determined as follows: t f (v cc ? 0.7) c x /20 ma (t f is the time between the supply voltage turn off and the supply voltage reaching 0.4 v cc .) in the even a system does not satisfy the a bove condition, an external clamping diode (d x ) is needed to protect the ic from rush current. c x 1 2 13 4 14 15 d x v cc r x c x r x /c x 3 clr a b q q c x 9 10 5 12 67 d x v cc r x c x r x /c x 11 clr a b q q
tc74vhc123,221af/aft/afk 2012-02-29 4 system diagram tc74vhc123a timing chart tc74vhc123a l h r qd q ck r x /c x c x a b clr q q v cc v cc f/f q p q n v ref c 1 v ref c 2 t wout t wout + t rr t wout t rr v ih v il v cc v oh v ol a b clr r x /c x q v il v ih v il v ref h v ref l gnd v oh v ol q v ih
tc74vhc123,221af/aft/afk 2012-02-29 5 system diagram tc74vhc221a timing chart tc74vhc221a l h r qd q ck r x /c x c x a b clr q q v cc f/f q p q n v ref c 1 v ref c 2 t wout t wout t wout v ih v il v cc v oh v ol a b clr r x /c x q v ih v il v ih v il v ref h v ref l gnd v oh q v ol
tc74vhc123,221af/aft/afk 2012-02-29 6 functional description (1) standby state the external capacitor (c x ) is fully charged to v cc in the stand-by state. that means, before triggering, the q p and q n transistors which are connected to the r x /c x node are in the off state. two comparators that relate to the timing of the output pulse, and two reference voltage supplies turn off. the total supply current is only leakage current. (2) trigger operation trigger operation is effective in any of the follo wing three cases. first, the condition where the a input is low, and the b input has a rising sign al; second, where the b input is high, and the a input has a falling signal; and third, where the a input is low and the b input is high, and the clr input has a rising signal. after a trigger becomes effective, comparators c 1 and c 2 start operating, and q n is turned on. the external capacitor discharges through q n . the voltage level at the r x /c x node drops. if the r x /c x voltage level falls to the internal reference voltage v ref l, the output of c 1 becomes low. the flip-flop is then reset and q n turns off. at that moment c 1 stops but c 2 continues operating. after q n turns off, the voltage at the r x /c x node starts rising at a ra te determined by the time constant of external capacitor c x and resistor r x . upon triggering, output q becomes high, following some delay time of the internal f/f and gates. it stays high even if the voltage of r x /c x changes from falling to rising. when r x /c x reaches the internal reference voltage v ref h, the output of c 2 becomes low, the output q goes low and c 2 stops its operation. that means, after triggeri ng, when the voltage level of the r x /c x node reaches v ref h, the ic returns to its monostable state. with large values of c x and r x , and ignoring the discharge time of the capacitor and internal delays of the ic, the widt h of the output pulse, t w (out) , is as follows: t w (out) = 1.0 c x r x (3) retrigger operation (tc74vhc123a) when a new trigger is applied to either input a or b while in the monostable state, it is effective only if th e ic is charging c x . the voltage level of the r x /c x node then falls to v ref l level again. therefore the q output stays high if the next trigger comes in before the time period set by c x and r x . if the new trigger is very close to previous trigger, such as an occurrence during the discharge cycle, it will have no effect. the minimum time for a trigger to be effective 2nd trigger, trr (min.), depends on vcc and cx. (4) reset operation in normal operation, the clr input is held high. if clr is low, a trigger has no effect because the q output is held low and the tr igger control f/f is reset. also, q p turns on and c x is charged rapidly to v cc . this means if clr is set low, the ic goes into a wait state.
tc74vhc123,221af/aft/afk 2012-02-29 7 absolute maximum ratings (note) characteristics symbol rating unit supply voltage range v cc ? 0.5 to 7.0 v dc input voltage v in ? 0.5 to 7.0 v dc output voltage v out ? 0.5 to v cc + 0.5 v input diode current i ik ? 20 ma output diode current i ok 20 ma dc output current i out 25 ma dc v cc /ground current i cc 50 ma power dissipation p d 180 mw storage temperature t stg ? 65 to 150 c note: exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in ic performance or even destruction. using continuously under heavy loads (e.g. the app lication of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temper ature/current/voltage, etc. ) are within the absolute maximum ratings and the operating ranges. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook (?handling precautions?/?derating concept and methods?) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). operating ranges (note 1) characteristics symbol rating unit supply voltage v cc 2.0 to 5.5 v input voltage v in 0 to 5.5 v output voltage v out 0 to v cc v operating temperature t opr ? 40 to 85 c input rise and fall time dt/dv 0 to 100 (v cc = 3.3 0.3 v) 0 to 20 (v cc = 5 0.5 v) ns/v external capacitor c x no limitation (note 2) f external resistor r x 5 k (note 3) (v cc = 2.0 v) 1 k (note 3) (v cc 3.0 v) ? note 1: the operating ranges must be maintai ned to ensure the normal op eration of the device. unused inputs must be tied to either vcc or gnd. note 2: the maximum allowable values of c x and r x are a function of leakage of capacitor c x , the leakage of tc74vhc123a/221a, and leakage due to boar d layout and surface resistance. susceptibility to externally induced noise signals may occur for r x > 1 m ? .
tc74vhc123,221af/aft/afk 2012-02-29 8 electrical characteristics dc characteristics test condition ta = 25c ta = ? 40 to 85c characteristics symbol v cc (v) min typ. max min max unit high-level input voltage v ih D 2.0 3.0 to 5.5 1.50 v cc u 0.7 D D D D 1.50 v cc u 0.7 D D v low-level input voltage v il D 2.0 3.0 to 5.5 D D D D 0.50 v cc u 0.3 D D 0.50 v cc u 0.3 v i oh = ? 50 a 2.0 3.0 4.5 1.9 2.9 4.4 2.0 3.0 4.5 D D D 1.9 2.9 4.4 D D D high-level output voltage v oh v in = v ih or v il i oh = ? 4 ma i oh = ? 8 ma 3.0 4.5 2.58 3.94 D D D D 2.48 3.80 D D v i ol = 50 a 2.0 3.0 4.5 D D D 0.0 0.0 0.0 0.1 0.1 0.1 D D D 0.1 0.1 0.1 low-level output voltage v ol v in = v ih or v il i ol = 4 ma i ol = 8 ma 3.0 4.5 D D D D 0.36 0.36 D D 0.44 0.44 v input leakage current i in v in = 5.5 v or gnd 0 to 5.5 D D 0.1 D 1.0 a r x /c x terminal off-state current i in v in = v cc or gnd 5.5 D D 0.25 D 2.5 a quiescent supply current i cc v in = v cc or gnd 5.5 D D 4.0 D 40.0 a active-state supply current (note) i cc v in = v cc or gnd r x /c x = 0.5 v cc 3.0 4.5 5.5 D D D 160 380 560 250 500 750 D D D 280 650 975 a note: per circuit
tc74vhc123,221af/aft/afk 2012-02-29 9 timing requirements (input: t r = t f = 3 ns) test condition ta = 25c ta = ? 40 to 85c characteristics symbol v cc (v) typ. limit limit unit minimum pulse width t w (l) t w (h) D 3.3 0.3 5.0 0.5 D D 5.0 5.0 5.0 5.0 ns minimum clear width ( clr ) t w (l) D 3.3 0.3 5.0 0.5 D D 5.0 5.0 5.0 5.0 ns r x = 1 k ? c x = 100 pf 3.3 0.3 5.0 0.5 60 39 D D D D ns minimum retrigger time (note) t rr r x = 1 k ? c x = 0.01 f 3.3 0.3 5.0 0.5 1.5 1.2 D D D D s note: for tc74vhc123a only ac characteristics (input: t r = t f = 3 ns) test condition ta = 25c ta = ? 40 to 85c characteristics symbol v cc (v) c l (pf) min typ. max min max unit 15 D 13.4 20.6 1.0 24.0 3.3 0.3 50 D 15.9 24.1 1.0 27.5 15 D 8.1 12.0 1.0 14.0 propagation delay time ( a, b-q, q) t plh t phl D 5.0 0.5 50 D 9.6 14.0 1.0 16.0 ns 15 D 14.5 22.4 1.0 26.0 3.3 0.3 50 D 17.0 25.9 1.0 29.5 15 D 8.7 12.9 1.0 15.0 propagation delay time ( clr trigger-q, q ) t plh t phl D 5.0 0.5 50 D 10.2 14.9 1.0 17.0 ns 15 D 10.3 15.8 1.0 18.5 3.3 0.3 50 D 12.8 19.3 1.0 22.0 15 D 6.3 9.4 1.0 11.0 propagation delay time ( clr -q, q ) t plh t phl D 5.0 0.5 50 D 7.8 11.4 1.0 13.0 ns 3.3 0.3 D 160 240 D 300 c x = 28 pf r x = 2 k ? 5.0 0.5 50 D 133 200 D 240 ns 3.3 0.3 90 100 110 90 110 c x = 0.01 f r x = 10 k ? 5.0 0.5 50 90 100 110 90 110 s 3.3 0.3 0.9 1.0 1.1 0.9 1.1 output pulse width t wout c x = 0.1 f r x = 10 k ? 5.0 0.5 50 0.9 1.0 1.1 0.9 1.1 ms output pulse width error between circuits (in same package) ' t wout D D 1 D D D % input capacitance c in D D 4 10 D 10 pf power dissipation capacitance c pd (note) D 73 D D D pf note: c pd is defined as the value of the internal equivalent capacitance which is ca lculated from the operating current consumption without load. average operating current can be obtained by the equation: i cc (opr) = c pd v cc f in + i cc? duty/100 + i cc /2 (per circuit) (i cc? : active supply current) (duty: %)
tc74vhc123,221af/aft/afk 2012-02-29 10 input equivalent circuit external capacitor c x (pf) t wout ? c x characteristics (typ.) output pulse width t wout ( s) supply voltage v cc (v) t rr ? v cc characteristics (typ.) (tc74vhc123a) minimum retrigger time t rr ( s) supply voltage v cc (v) output pulse width constant k ? supply voltage (typ.) (external resistor (r x ) = 10 k ? : t wout = kc x r x ) output pulse width constant k 0.01 0 0.1 1 10 1 2 3 4 5 6 c x = 0.01 f c x = 1000 pf c x = 100 pf ta = 2 5 c 10 3 10 ? 1 10 2 10 2 10 1 10 3 10 4 v cc = 4.5 v c l = 50 pf r x = 1 m ? r x = 100 k ? r x = 10 k ? r x = 1 k ? 1.2 2 3 4 5 6 1.1 1.0 c x = 0.01 f c x = 1000 pf c x = 1 f, c x = 0.1 f input
tc74vhc123,221af/aft/afk 2012-02-29 11 package dimensions weight: 0.18 g (typ.)
tc74vhc123,221af/aft/afk 2012-02-29 12 package dimensions weight: 0.06 g (typ.)
tc74vhc123,221af/aft/afk 2012-02-29 13 package dimensions weight: 0.02 g (typ.)
tc74vhc123,221af/aft/afk 2012-02-29 14 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collect ively "toshiba"), reserve the right to make changes to the in formation in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduc ed without prior written permission from toshiba. even with toshiba's written permission, reproduc tion is permissible only if reproducti on is without alteration/omission. ? though toshiba works continually to improve product's quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for prov iding adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situat ions in which a malfunction or failure of product could cause loss of human life, b odily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, cu stomers must also refer to and comply with (a) the latest ve rsions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and application notes for product and the precautions and condi tions set forth in the "toshiba se miconductor reliability handbook" and (b) the instructions for the application with which the product will be us ed with or for. customers are solely responsible for all aspe cts of their own product design or applications , including but not limited to (a) determining the appropriateness of the use of this product in such design or applications; (b) evaluating and determining the applicability of any information contained in this document, or in c harts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operatin g parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. ? 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